Auto-Arch Tournament vs Expo

Auto-Arch Tournament is an autonomous research system where an AI agent iteratively proposes, implements, and validates microarchitectural improvements to a RISC-V CPU. Starting from a standard 5-stage pipeline, the loop runs hypotheses in parallel, each going through formal verification (53 symbolic checks), cycle-accurate simulation, multi-seed FPGA place-and-route, and CoreMark CRC validation. Only hypotheses that beat the current champion get merged; everything else gets discarded. Starting from 301 iterations/second, the system hit 577 iter/s (+92%) across 73 attempts in 9.8 hours — producing a design 26% faster and 40% smaller in LUTs than the baseline. The insight the author drives home is that the real innovation isn't the AI agent — it's the verifier. The orchestrator is hardcoded to prevent agents from manipulating their own evaluation gates, a simple but critical design constraint that turns a creative process into a trustworthy one. Without a rigorous verification harness, agent-driven optimization becomes a confidence trick. This is early but fascinating proof that AI-driven hardware design loops can produce commercially meaningful gains. The repo uses Claude Code or Codex as the coding agent, SystemVerilog for the RTL, and standard open-source EDA tooling (Yosys, nextpnr, Verilator). It's a compelling template for anyone building agentic optimization loops where correctness matters.

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